James Roy Bulpin James.Bulpin-www@contact.org.uk Work Address XenSource UK Ltd. Black Horse House Castle Park Cambridge UK CB3 0FL +44 (0)1223 326740 Home Address Cambridge, UK. Please email me for details. Nationality: British Marital Status: Single D.O.B.: 07/10/1977 Education and Qualifications 2000--2004 University of Cambridge Computer Laboratory. PhD: ``Operating System Support for Simultaneous Multithreaded Processors''. June 1999 King's College, Cambridge. Degree: First Class BA Hons. (Cantab). (Computer Science) Summer 1996 A-levels: Mathematics, Physics and Chemistry, all grade A. Summer 1995 A-level Electronics, grade A. 1993--1994 10 GCSEs (4 grade A*, 3 grade A, 3 grade B). Additional Qualifications and Achievements King's College: Richards Prize, July 1999. Elected a Scholar 1997, 1998 and 1999. Sixth Form: Crest Gold Award (Engineering). A. J. Bright Science Award. Full, clean driving licence. Private Pilot Licence. Current Position Since February 2005, Senior Manager, Quality Assurance at XenSource UK Ltd., a part of Citrix Inc., (formerly XenSource acompany founded to commercialise the Xen Virtual Machine Monitor). I started as a Senior Developer and later promoted to Operations Manager; I also had the additional role of Release Manager for our first Windows virtualisation product. I now run the verification department of the company. I am responsible for ensuring our products are of a high standard of reliability and functional correctness. My responsibilities include developing and managing our in-house test automation framework and utilising this to support both our Open-Source and commercial product test execution. This part of my role includes engineering work as well as managing a small team. My role as Release Manager made me responsible for the on-time delivery of a product which conforms to the agreed feature set and quality level. I oversee IT operations for the UK part of the company and for our external infrastruture in support of the Open-Source community. Employment Jul 2004--Mar 2005 Research Associate, Systems Research Group, University of Cambridge Computer Laboratory. Data analysis, infrastructure management, test harness development for the ``NProbe'' network monitoring, and Xen Virtual Machine Monitor projects. Summer 2003 Internship at Microsoft Research, Cambridge. Working on real-time analysis of performance monitoring data to extract and model requests (such as web or database). 1999--2001 Consultancy in the area of network usage analysis. Developed a system to analyse large volumes of log files from different systems to provide network usage information. Oct 1999--Sep 2000 Research Assistant, Systems Research Group, University of Cambridge Computer Laboratory. Work included a kernel interface to a network-attached disk and deployment of network monitoring hardware. 1999-2005 Supervising (small group teaching) undergraduate and diploma students, University of Cambridge Computer Laboratory. Courses include computer architecture, digital communications, operating systems and electronics. 1999-2005 Network planning, installation and management for King's College, Cambridge. 1999-2003 Database Consulting for King's College, Cambridge. Summer 1999 Computer Officer, King's College, Cambridge. Summer 1998 Development Support Assistant, Jobstream Group plc, Cambridge. Summer 1998 Web-site development, King's College, Cambridge. 1996--1997 Computer Technician, Edward Martin Computer Services, Somerset. Previous Various casual jobs including driving and catering. Research Interests and Experience Architecture, operating system and application interactions I am interested in the effect on applications of various architecture and operating system mechanisms. I have looked at the implicit cost of context switching due to effects such as cache pollution. My recently completed PhD thesis was on ``Operating System Support for Simultaneous Multithreaded Processors''. This work covered a number of aspects including a detailed analysis of thread interaction effects on Intel's Hyper-Threading systems and the development of techniques to estimate performance and influence process scheduling. Merged processor-memory systems (``Intelligent Memory'') Intelligent memory systems combine computation and memory elements in the same chip. This architecture aims to reduce the memory access latency compared to traditional architectures. Most previous work in this area has focused on using these devices in supercomputers or high powered workstations, I am interested in how to deploy intelligent memories in commodity desktop computers in terms of architecture and operating system support. Processor architecture, particularly simultaneous multithreading Superscalar processor architecture is of interest to me. My undergraduate final year project involved the design and Verilog implementation of a superscalar processor based on the ARM instruction set architecture. I am following architecture developments in this, and related, areas, particularly SMT processors. Network Monitoring My current employment, as well as previous work, involves deploying network monitoring hardware on high-speed links and analysing the data gathered. Efficient analysis of large volumes of data require careful analysis techniques. Network-attached disk filing system As part of my work as a Research Assistant I developed a kernel interface to a prototype network-attached disk. I implemented a user-space file system and authentication system using these disks. The disk was organised as an extent store, extents belonging to an instance of the file system were able to exist on the same disk as extents belonging to other instances and with extents forming a demonstration ``media file system''. Publications {\it Multiprogramming Performance of the Pentium 4 with Hyper-Threading}. In the Third Annual Workshop on Duplicating, Deconstruction and Debunking (at ISCA'04), pp53--62. June 2004. {\it Request extraction in Magpie: events, schemas and temporal joins}. In the 11th ACM SIGOPS European Workshop. September 2004. {\it Hyper-Threading Aware Process Scheduling Heuristics}. In the 2005 USENIX Annual Technical Conference, pp399--402. April 2005. {\it Physical Layer Impact upon Packet Errors}. In the Passive and Active Measurement Conference, pp131--140. March 2006. Relevant Experience Software Development * Familiarity with multiple languages including C, Java, Python, Bash and Verilog. Familiar with development on both Windows and Unix platforms. * Experience with languages including C++, C\#, Perl, SQL. * Experience in writing cross-platform software including Java (including RMI and JNI), Win32 and Linux. * Test automation in an enviroment where off-th-shelf test automation packages are not suitable. * Kernel programming within Linux and the Flux OS Kit. Use of hardware performance counters for application instrumentation. * Familiar with performance monitoring and event tracing in Windows. * Developed programs and scripts to efficiently analyse large amounts of Internet server log file data and packet traces. * Wrote a documentation extraction application to produce a tree of HTML files containing information gleaned from Visual Objects code and inline comments (similar to the Javadoc system). * Experience with developing for embedded systems, including Forth and PIC assembly. Other technical skills and experience * Hardware design and construction, mainly small to medium digital circuits and microcontrollers. Familiar with the Verilog hardware description language. * Network design, installation and management. * System administration including Windows, Linux and Netware networks. Non-technical skills and experience * Manage a small group of engineers developing a test automation framework. * Coordinate a significant commerical product developed across three geographically distributed sites. * Experience of working both as part of a team (in commercial and academic contexts) and alone. * Extensive small-group teaching experience covering topics in operating systems, networking and hardware/processor design. * Have interviewed Computer Science undergraduate applicants for King's College, Cambridge and have taken an active part in the acceptance decision. * Have made a number of presentations including some in public forums. References Please email me for details of referees.